Test on Half adder and full adder

Question 1: Full adders can be cascaded, with the Carry-out of one full adder connecting to the Carry-in of the next more significant full adder, to perform addition on multi-bit binary numbers.

A. Yes

B. No

Explanation: The study materials state, 'The true power of the full adder lies in its ability to be cascaded, or chained together, to perform addition on binary numbers with multiple bits. By connecting the Carry-out of one full adder to the Carry-in of the next more significant full adder, we can build circuits that add 2-bit, 4-bit, 8-bit, or even 64-bit binary numbers, which is essential for computer processors.'

Question 2: The Boolean expression for the Sum output of a half adder is represented by S = A ⊕ B.

A. Yes

B. No

Explanation: The study materials explicitly state that the Sum (S) output of a half adder is 1 when inputs A and B are different, which is characteristic of an Exclusive OR (XOR) gate. Thus, the Boolean expression for the Sum is S = A ⊕ B.

Question 3: According to the study materials, if the inputs to a half adder are A = 1 and B = 1, what are the resulting Sum (S) and Carry-out (C_out)?

A. Sum (S) = 1, Carry-out (C_out) = 0

B. Sum (S) = 0, Carry-out (C_out) = 1

C. Sum (S) = 0, Carry-out (C_out) = 0

D. Sum (S) = 1, Carry-out (C_out) = 1

Explanation: The study materials state the truth table for a half adder. When Input A is 1 and Input B is 1, the Sum (S) is 0 and the Carry-out (C_out) is 1. This reflects the binary addition rule 1 + 1 = 10₂, where '0' is the sum for the current position and '1' is the carry bit.

Question 4: According to the provided study materials, which combination of components is used to construct a full adder?

A. Two half adders and one OR gate

B. One half adder and two OR gates

C. Two half adders and one AND gate

D. One half adder and one XOR gate

Explanation: The study materials explicitly state: 'A full adder can be constructed using two half adders and one OR gate.' The first half adder takes A and B, and the second half adder takes the partial sum and the Carry-in. The final Carry-out is obtained by ORing the carries from these two stages.

Question 5: When adding 11₂ and 11₂ in a 2-bit adder, the resulting 2-bit sum is 00₂.

A. Yes

B. No

Explanation: Adding 11₂ and 11₂ in a 2-bit adder results in a 2-bit sum of 10₂ with a final Carry-out of 1, not 00₂.