Summary of Fundamentals of Digital Signal Processing
Fundamentals of Digital Signal Processing: Your Complete Guide
Introduction
Analog-to-digital conversion is the process that turns continuous physical signals (usually voltages) into discrete digital numbers that computers can store and process. This material explains sampling, quantization, A/D and D/A converter principles, common architectures, and practical considerations for engineering applications.
Definition: An Analog-to-Digital Converter (ADC) is a device that converts a continuous analog signal into a discrete digital representation by sampling in time and quantizing in amplitude.
1. Two fundamental steps of conversion
- Sampling (time discretization)
- We take signal values at uniform instants separated by sampling period $T_s$; sampling frequency is $F_s = 1/T_s$.
- Sampled sequence: $s_d[n] = s_a(nT_s)$.
- Quantization (value discretization)
- Each sample is rounded to one of a finite set of amplitude levels determined by the converter resolution.
- Quantization step (LSB) depends on reference range and number of bits.
Definition: Quantization error is the difference between the true sample value and its quantized representation; its maximum magnitude is $\frac{\Delta}{2}$ where $\Delta$ is the quantization step.
2. Sampling theorem and aliasing
- Sampling theorem (Nyquist–Shannon): A bandlimited signal with maximum frequency $f_{\text{max}}$ can be perfectly reconstructed from samples if $F_s > 2 f_{\text{max}}$.
$$F_s > 2 f_{\text{max}}$$
- If the condition fails, aliasing occurs: frequency components above $F_s/2$ are folded into the baseband and cannot be recovered.
Practical note: anti-aliasing filter
- Use a low-pass (anti-alias) filter before sampling to attenuate components above $F_s/2$.
3. Signal reconstruction (D/A conversion)
- The theoretical reconstruction uses sinc interpolation:
$$s_r(t) = \sum_{n=-\infty}^{\infty} s_d[n] ; \text{sinc}\left(F_s (t - nT_s)\right)$$
- Practical reconstruction uses a staircase output from a DAC followed by a low-pass filter to remove high-frequency stair harmonics.
Definition: A Digital-to-Analog Converter (DAC) transforms digital numbers into an analog signal, usually by producing a staircase waveform that is filtered to approximate the original continuous signal.
4. Common ADC architectures
Table: ADC types, main trade-offs
| ADC type | Speed | Resolution | Typical use | Notes |
|---|---|---|---|---|
| Successive Approximation (SAR) | Medium | 8–16 bits | Microcontrollers, sensors | Good compromise of speed and accuracy; one comparison per bit |
| Flash (parallel) | Very high | Low–medium | High-speed digitizing (oscilloscopes) | Requires $2^N$ comparators; cost/complexity grows fast |
| Delta-Sigma (oversampling) | Low–medium | High (16–24 bits) | Precision audio, instruments | Uses oversampling and noise shaping; often slow |
| Dual-slope / integration | Low | High | Precision meters | Very stable and noise-immune |
Successive Approximation Register (SAR) ADC
- Operation: interval bisection using a DAC and comparator. Start with MSB, set bit, compare DAC output $v_{DA}$ with input $v_{in}$, accept or clear bit, proceed to next bit.
- Requires $N$ comparator cycles for $N$ bits.
Example workflow for 4-bit SAR: choose midpoints, compare, refine interval until all 4 bits decided.
Flash ADC
- All thresholds compared in parallel producing a thermometer code; then encoded to binary.
- Extremely fast but hardware-expensive for high resolution.
Delta-Sigma ADC (overview)
- Uses oversampling and noise shaping to push quantization noise to higher frequencies, then filters and decimates to obtain a high-resolution digital output.
5. DAC
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ADC and DAC Basics
Klíčové pojmy: ADC converts continuous voltage into discrete-time samples and quantized amplitudes, Sampling period $T_s$ and sampling frequency $F_s=1/T_s$ determine time discretization, Nyquist condition: $F_s>2f_{\text{max}}$ to avoid aliasing, Quantization step $\Delta$ limits accuracy; quantization error max $\Delta/2$, SAR ADC works by successive interval bisection, one comparison per bit, Flash ADC is very fast but requires $2^N$ comparators for $N$ bits, DAC outputs a staircase waveform which needs a low-pass filter for smooth reconstruction, SNR of an ideal $N$-bit ADC: $\text{SNR}_{\text{dB}}\approx 6.02N+1.76$, Use anti-alias filters before ADC and reconstruction filters after DAC, PWM is a low-cost DAC alternative for control applications, Higher resolution beyond noise floor gives no practical benefit, S/H circuits hold input stable during conversion to prevent error