Summary of Analog-Digital Conversion and DSP Basics

## Introduction Data conversion is the process of transforming analog signals into digital representations and vice versa. This material focuses on single-bit converters (delta modulation, CVSD, delta-sigma) and analog anti-aliasing filters used in data acquisition chains. You will learn how single-bit techniques trade bit-depth for sampling rate, how multirate approaches reduce analog complexity, and how different analog filters affect signal fidelity. > Definition: A data converter is a device or circuit that transforms a continuous-time/continuous-amplitude signal into a discrete-time/discrete-amplitude signal (ADC) or the reverse (DAC). ## Single-bit Conversion: Overview Single-bit converters represent each sample by a single binary value (1 or 0). They are widely used where simplicity and robustness matter, such as in telecommunications and voice/music reproduction. Two historical families are: - Delta modulation (DM) and its variants - Delta-sigma (also spelled delta–sigma) modulation ### Why single-bit? Key idea - Use a very high sampling rate and only one bit per sample. - Information is encoded in the density or pattern of 1s and 0s over time rather than in multi-bit amplitude levels. > Definition: Single-bit ADC/DAC is a conversion approach where each sample is represented by one binary digit; analog amplitude information is recovered from average or time density of these bits. ## Delta Modulation (DM) ### Basic block diagram and operation - Comparator compares the analog input to a feedback capacitor voltage. - Latch synchronizes the comparator decision to the sampling clock (defines sampling rate $f_s$). - Output bit (1 or 0) drives a switch that injects a fixed positive or negative increment into the capacitor. - The feedback loop forces the capacitor voltage to track the input in steps. Example behavior: - If input is increasing, more 1s appear than 0s; if decreasing, more 0s than 1s. - For a constant input, output toggles 1,0,1,0 producing an average equal to the input. > Definition: Slew rate in DM is the maximum rate at which the feedback capacitor voltage can change, determined by step size and clock rate. ### Advantages and limitations - Advantage: All transmitted bits have equal significance (no start/stop/LSB/MSB structure) and receiver can be a simple feedback integrator that reconstructs the signal. - Limitation: Tradeoffs among maximum slew rate, quantization step size, and data rate. Achieving sufficient slew rate for voice often pushes $f_s$ into the MHz region, which can be impractical. ## Continuously Variable Slope Delta (CVSD) ### Motivation and mechanism - CVSD improves DM by adapting step size when the modulator is slewing (unable to keep up with input slope). - Use a fixed clock and moderate number of effective quantization levels (e.g., $f_s\approx 30\text{ kHz}$ and nominally many levels internally), then change the step size dynamically. - A shift register monitors the last few bits (commonly 4). If the last bits are all 1s or all 0s, the circuit increases step size (syllabic control) so the output can keep up with steep slopes. - A matching syllabic filter is used at the receiver to restore proper amplitude behavior. ### Limits - Well suited for voice but not general-purpose ADCs because the digital stream reflects derivative-like behavior; DC levels can be poorly represented and changing step size complicates precise amplitude recovery. ## Delta-Sigma (ΔΣ) Modulation ### Basic principle - Delta-sigma converts the input into a high-rate single-bit stream where the density of ones encodes the analog amplitude (not its slope). - The feedback loop is arranged so that when the input is positive, more 1s are produced (voltage on integrator tends negative) and when input is negative, more 0s are produced. - The output bitstream is passed through a low-pass filter (analog or digital) to obtain the analog estimate. > Definition: Delta-sigma converter is a combination of oversampling, n